PCB Trace Width Calculator January 31, 2006
This Javascript web calculator calculates the trace width for printed circuit boards based on a curve fit to IPC-2221 (formerly IPC-D-275). Also see the via calculator.
New features:
- Results update as you type
- Several choices of units
- Units and other settings are saved between sessions
- Blog format allows user comments
Inputs:
| Current | Amps | |
| Thickness |
Optional Inputs:
| Temperature Rise | Deg | |
| Ambient Temperature | Deg | |
| Trace Length |
Results for Internal Layers:
| Required Trace Width | ||
| Resistance | Ohms | |
| Voltage Drop | Volts | |
| Power Loss | Watts |
Results for External Layers in Air:
| Required Trace Width | ||
| Resistance | Ohms | |
| Voltage Drop | Volts | |
| Power Loss | Watts |
Notes:
The trace width is calculated as follows:
First, the Area is calculated:
Area[mils^2] = (Current[Amps]/(k*(Temp_Rise[deg. C])^b))^(1/c)
Then, the Width is calculated:
Width[mils] = Area[mils^2]/(Thickness[oz]*1.378[mils/oz])
For IPC-2221 internal layers: k = 0.024, b = 0.44, c = 0.725
For IPC-2221 external layers: k = 0.048, b = 0.44, c = 0.725
where k, b, and c are constants resulting from curve fitting to the IPC-2221 curves
For geometry diagrams, click on the pictures below.
For frequently asked questions, see the comments.
- Posted in : Calculators, Electrical Engineering, PCB
- Author : Brad
Comments
Trace Width Calculator FAQs
1a. QUESTION: Very cool PCB width tool! I would like to know its limits though. I entered a 65 amp current requirement and it returned a track width that must be incorrect.
1a. ANSWER: The original graphs that this tool is based on (published in IPC-D-275) only cover up to 35 Amps, up to 0.4 inches of trace width, from 10 to 100 degrees C of temperature rise, and copper of 0.5 to 3 ounces per square foot. The formulas used here will simply extrapolate when the values are outside of these ranges.
1b. QUESTION: I used your PCB trace width calculator. Intuitively I would say the required internal trace width would be less than the external case since the external trace can peal off; the opposite is true according to the calculator???? Why?
1b. ANSWER: In air, the external layers have better heat transfer due to convection. A good heat insulator blankets the internal layers, so they get hotter for a given width and current. Since the Trace Width Calculator tries to control the temperature rise of the traces, it makes the internal traces wider. In vacuum, or in a potted assembly, you should use the internal layer guidelines even for the external layers.
1c. QUESTION: What does temperature rise mean and how does it apply?
1c. ANSWER: Temperature rise means how much hotter the trace will get with current flowing in it compared to without. You have to decide how much temperature rise your board can handle based on the operating environment and the type of PWB material used. Ten degrees is a very safe number to use for just about any application. If you can live with the trace width required for a ten-degree rise, you are good to go. If you want to try to skinny up the traces, ask for 20 degrees of temperature or more.
1d. QUESTION: I use “wagon wheels” or “spokes” when connecting to a ground plane to make it easier to solder to. The trace width calculator is telling me to make the “spokes” so wide that it defeats the purpose. What should I do?
1d. ANSWER: The wagon wheels spokes are very short length traces and are heat sunk to the plane. The trace width calculator uses empirical formulas based on long traces with no special heat sinking. Generally, the wagon wheel spokes do not have to be anywhere near as wide as long traces. However, at this time, I don’t know of a good way to do calculations for wagon wheel spokes.
1e. QUESTION: What are Mils?
1e. ANSWER: A Mil is 1/1000 of an inch.
If I have a plane that provides plenty of heatsinking area, but at one point my overall width necks down to 60 mils. I am running 3 amps max through this and it is an inner plane on 0.5 oz Cu. I am wondering if this calculator really only applies to a textbook design of a trace of x width and y length - and not to something like my scenario? I think there is plenty of heatsinking area, but i recognize that the 60 mil spot on my board is the “bottleneck” for current, but its length is less than 200 mils. Outside that area, there is a whole plane (swiss cheesed by various connectors and vias).
jds - Yes, you are right. The trace width calculator is more geared towards long traces. Short traces with heatsinking to planes do not get as hot.
I want to know about high-speed PCB design. Please give me some documents about high-speed PCB design.
How should I work in pulsed current into your formula. An example would be a 10uS pulsed 45 Amps then a delay of 7 seconds. Also, it would be helpful if you added entering your present design trace i.e. weight, width, lenght, current, duty cycle or pulse width, with an output from the calculator to include IR drop and temperature rise.
Normally for pulsed currents, you can use the RMS value (see http://www.geocities.com/CapeCanaveral/Lab/9643/rms.htm). However in your case, the timing is probably slower than the thermal time constant of the board, so you can’t count on the thermal mass to average out the temperature. For now, it is beyond what this calculator can do, but I’ll think about it.
Are there any guidelines or rules of thumb were multiple planes are utilized.
Donald – For distributing current in multiple layers, I recommend putting lots of vias. Then if the layers are different thicknesses, treat them as a current divider to calculate the current distribution. If they are all the same kind of layer (all internal or all external), then you can just add up all the thicknesses and calculate the trace width as if they were one layer.
Brad
Hello,
How can I calculate the number of vias, drills and diameters for different currents? Is there also a tool for this?
Thank you for your help.
Andre
Andre - I plan on adding a via calculator soon, but for now I am going to recommend that you take a look at this excellent application note from Texas Instruments by Robert Kollman titled Constructing Your Power Supply – Layout Considerations.
Brad
Update: The Via Calculator is now here:
http://circuitcalculator.com/wordpress/2006/03/12/pcb-via-calculator/
Hi,
I would like to be able to work backwards to increase a track size to lower the power loss in the track. Do you have a way to do it? If not can you expose the formulas so I can do it in a spreadsheet of my own?
Sincerely,
Mike Fontes
Mike,
See
http://circuitcalculator.com/wordpress/2006/04/20/find-pcb-trace-width-based-on-power/
What is the formula to calculate the trace width?
bhaskar,
The formula is shown below the calculator.
Brad
What is IPC-D-275? How do they calculate the k, b, and c values?
IPC-D-275 is a standard for printed circuit board design that has guidelines for trace width verses current. IPC-D-275 has been replaced by IPC-2221 and IPC-2222, but the guidelines regarding current carrying capacity have not changed and are now in IPC-2221.
The values for k, b, and c used here were not calculated in IPC-D-275 or IPC-2221, but were determined using an empirical curve fit.
I went ahead and updated my references from IPC-D-275 to IPC-2221.
Brad
Do you have any information on sizing PCB tracks for fuses and what considerations should be taken into account?
The second parameter in yellow, “Input thickness”: does it refer to the thickness of the PCB itself or the width of the tracing (which does not seem to make any sense since it is given as a result parameter?)
thanks!
Bo – It refers to the thickness of the copper foil.
Brad
—forwarded message—
Hi Brad.
Thanks for your response. I was interested in sizing tracks from fused supplies. Since I sent you the last email, I have found out that rating the track to 160% of the fuse value (at room temp.) is a good rule of thumb that is recommended by automotive companies.
Cheers
Brendan
Thanks–saves me lots of time when laying out 3-10 ampere power supplies and high wattage audio power amplifiers.
What is the formula for pcb trace length from time delay?
For the 100pS ,what is the trace length?
Ansari,
The trace length in meters as a function of time delay and relative dielectric constant is:
Length(Time_Delay, Relative_Dielectric_Const) =
c * Time_Delay / SQRT(Relative_Dielectric_Const)
where
c = 3E8 m/s = speed of light in free space
Relative_Dielectric_Const depends on board material and is ~4.5 for FR4
So, for example the length for a 100 ps delay with FR4 is
0.0141 meters = 1.41 cm = 0.557 inches
Brad
I presume the calculator is based on a stead-state current supplied through the trace. If the current is not in a steady state as in a current spike situation that only occur in micro-seconds, how does the calculator take that into account?
John,
Yes, the calculator is based on steady-state current. It does not take into account pulses of short duration. If the pulses have a fast enough repetition rate (compared to the board’s thermal time constant), you can use the RMS current. Also see response #6 above on a similar topic.
Brad
Hi,
If I wanted to calcualte a width/weight of a copper external track I wanted to use as a fuse, does anyone have experience of how I could use this calculator to come up with a usable answer, maybe like specifying a high temperature rise?
Regards
Patrick
Hello everybody! I need a via calculator!!!
Can someone help me?
Does anyone know a specification or a guidelines to calculate it?
Thank You!
Samuele,
Try http://circuitcalculator.com/wordpress/2006/03/12/pcb-via-calculator/ and http://www.ultracad.com/articles/viacurrents.pdf . If those are not what you want, please let us know a little more what you need.
Brad
Hi,
I think the temperature rise has the relationship with the board size. How to consider this into calculation?
Thank you very much!
Vivi,
Some information about the effect of area on temperature rise can be found in the article “Constructing Your Power Supply - Layout Considerations”, by Robert Kollman
http://focus.ti.com/lit/ml/slup230/slup230.pdf
Brad
Hi,
I am designing a power board to control a motor from an actuator, FLA (Full Load Amps) = 12 Amps and LRA (Locked Rotor Amps) = 62 Amps. What is the rule in this case for the width and thickness of the trace? For start-up currents and a trace that is design to carry 12 amps, what would be the max current that this trace will handle to start that motor?
Thank you
Fernando,
It really depends on how long it takes the motor to start, and how much thermal mass is in the board. One approach would be to design the board for the full locked rotor current but with a higher temperature rise setting that you are comfortable with.
Brad
What are the calculations for the Resistance? And how do i convert betwen oz and mm?
Victor,
For resistance calculation details, see the notes in this post:
http://circuitcalculator.com/wordpress/2006/01/24/trace-resistance-calculator
A copper sheet of 1 oz/ft^2 has a thickness of 0.035 mm or 1.4 mils. Another handy thing to memorize is that 1 oz/ft^2 copper has a resistivity of 0.5 milliohms per square. It applies to a square of any size, so you can visually break a trace into squares and then quickly estimate resistance. Okay, so if we have a trace that is made of 0.5 oz/ft^2 copper and is 7 inches long and 0.5 inches wide, what is the resistance a.) using the head calculation method, and b.) using the trace calculator link above?
Brad
Thanx alot! And by the way, does the temperature raise affect the resistance in the calculator?
Victor,
Yes, the resistance is calculated at T_ambient + T_rise. Thanks for the good questions.
Brad
I have a requirement like this: heater trace must be 0.75 ohm at ambient temp and 0.83 ohm at 130 degrees, so should my temperature rise be 105 deg or 130 deg? Thanks.
Benjie,
Can you provide more details? Are you talking about degrees C or F? What is your ambient temperature?
For what you are doing, you may be better off using the trace resistance calculator here:
http://circuitcalculator.com/wordpress/2006/01/24/trace-resistance-calculator/
Brad
Hi Administrator
Some questions about the implemented equations: reading IPC-2221A,
section 6.2 we can read
Current[Amps] = k * (Temp_Rise[deg. C])^b * (Area[mils^2])^c
where
b = 0.44
c = 0.725
k = 0.048 for outer layers
k = 0.024 for inner layers
The coefficients are slightly different, how did you obtain your
equation? You did a curve-fitting directly from fig 6.4?
Do you plan to update this calculator with the new standard IPC-2152?
Thank you,
Joaquin
Joaquin,
My coefficients were slightly different because I did my own curve fit before the coefficients were published as part of IPC-2221A. Prior specs only published graphs, not equations. Since you pointed out the difference, I went ahead and updated my calculator to match IPC-2221A. I plan to keep the calculator updated to new the specs when they become available.
Thank you,
Brad
I have a PCB which will be molded, 15×25 mm approx, with 20A current on several nets. I’ve read the calc is based on long traces. I use the calc for reference, and obtain 2.5 mm intern - 6.6 mm extern for trace width. My connections are copper pour (area fill) 4-17mm in “length” depending on how you view it. Should I be sure the narrowest part of the pour is at least 2.5mm or in the case of short distance copper pours is something less acceptable? Any idea what the best standard reference is for this? THANKS… –las
las,
Note: Your internal and external traces appear to be reversed. Internal should be wider than external.
To answer your question, narrower traces may be acceptable in your case, but calculating how narrow they can be is kind of tricky.
I don’t think there is a standard for solving this kind of problem because it depends entirely on the specifics of your configuration. The most thorough analytical approach would be to do a thermal finite element analysis.
Other than that, you can do some hand calculation as discussed in Section V of:
“Constructing Your Power Supply - Layout Considerations”, by Robert Kollman
http://focus.ti.com/lit/ml/slup230/slup230.pdf
and/or use the thermal calculators here:
http://circuitcalculator.com/wordpress/?s=thermal
and/or do some experimenting of your own.
Sorry there is no simpler answer to your question that I am aware of!
Brad
How about calculating and showing the fusing currents in the trace and via calulators?
Hi Dennis,
That is a good idea. I found some references on fusing current here:
http://www.ultracad.com/articles/fusing.pdf
http://www.signalpro.com/bfailure.htm
However, it seems that the various formulas give widely different results and were not correlated to any test data are therefore extremely approximate. Does anyone know of a better study that has been tested? Is anyone interested in doing such a study? If we can find a formula that can be trusted, I will add it to the calculators.
Brad
—forwarded comment from Joe—
I don’t have access to IPC documents.
Some assumptions regarding these formulas are unclear/missing.
Can someone clarify the following situation?
1.93A, 1oz, 20c gives 50 mil trace width and
0.363A, 1oz, 20c gives 5 mil trace width.
If I route 5 traces at 5mil width (stack them on 5 adjacent layers)
I get 5 x 0.363A = 1.815A
or 94% of the current carrying capacity, with no additional
rise in temperature and 1/2 PCB area.
Seems strange since power is packed tighter, should be hotter,
and less capable of carrying current.
If I jam the 5 traces together to form one 25mil wide trace,
then I only get 1.166A capacity.
But if I use two layers with 25mil width, I can have 2.332A capacity.
If I go to 5oz copper, I only need 10mil for 1.93A, which does
scale linearly. Power density is very high here and less able
to be cooled due to less surface area with surroundings.
The arrangement of cross sectional geometry is not completely addressed.
Joe,
The IPC-2221 standard is based on some observed temperature rise data on some specific PCB test articles. The observed data was then converted into a empirical formulas. Your observations point out that the empirical relationship between width and current is not linear, however the relationship between thickness and current is linear. It seems likely that the IPC standard has assumed some spreading between traces which would allow paralleled traces to be able to carry more current at the same temperature rise than a single trace of the equivalent total width.
As far as the thickness to current relationship, it is linear because the required trace area is calculated then divided by thickness to get width. So while the area is based on a non-linear formula, the thickness has a basic linear scaling effect. Douglas Brooks [1] has done some studies where thickness and width were included as separate non-linear effects in the empirical equation. He was able to get slightly better curve fitting to the data.
There has forever been a push to find a better way to calculate the width-current-temperature relationship in PCBs, but this has been elusive. A recent good effort in progress is called IPC-2152 [2]. PCB thermal calculations can be done very accurately using finite element analysis software if the entire PCB board geometry, and layer stack-up, and surrounding thermal environment are modeled in complete detail, however this is usually too expensive and time consuming. Some projects demand that level of detail, however the present IPC-2221 standard gives us a simple time honored approach that is generally considered to be conservative.
[1] http://www.ultracad.com/articles/pcbtemp.pdf
[2] http://people.senecac.on.ca/john.ebden/aed/IPC2152.pdf
Brad
Brad,
Thanks for the additional information.
I also realized that when stacking narrower traces, the temperature rises need to be combined. So for example, with 5 traces stacked, the outer 2 may be at 70C ambient, but a rise in the trace temp (e.g. 10C) would leave the inner 3 at an ambient of near 80C.
Joe
Joe,
Good point. The temperature rises will stack up.
Brad
Hi,
Sorry for my bad english.
I have a doubt about the temperature rise limit.
What is the meaning of this limit, is due to material?
Could anyone explain how to fix this limit and the origin of the limit ?
Thanks, Gabriel
Gabriel,
Please see the answer at comment 1c above.
Brad
Hi
For the FR4 PWB material i only see this data about temperature:
Glass transition temperature 135 ºC
Temperature Index 130 ºC
This mean that the maximum temperature could be 130 ºC, also for the tracks?
If the ambient temperare is about 30 ºC, then the temperature rise could be 100 ºC?
Could you explain How to decide how much temperature rise your board can handle based on the operating environment and the type of PWB material used, with these data?.
There is any application note, or abstract explain the limits for the PWB material and the maximum allowed temperature for the tracks?
Thanks a lot, Gabriel
Gabriel,
You got it. You should not let the traces exceed the Relative Thermal Index (RTI) of the PCB material. Relative Thermal Index (RTI) as defined by Underwriters Laboratories UL 746B is the temperature at which 50% of material properties are retained after a conditioning period of 100,000 hours.
http://www.ul.com/plastics/thermal.html
Brad
After reading through, I’m still confused on the “Temperature Rise”. If I have a board with FR4 material, it has to operate in an environment from -20C to 85C, what are you saying the Temperature Rise should be? I have traces on an external layer, 1 oz copper. Is allowable temperature rise more a function of the board material or the environment?
Tara,
Actually the allowable temperature rise a function of both the board material AND the environment:
allowable_temp_rise = max_allowable_board_temp – max_ambient_environment_temp
HOWEVER, the above equation assumes that the trace is the only heat source on the board which is often not the case!
If you have other heat sources on your board, they will cause additional temperature rise which will need to be subtracted from the above equation.
Brad
Dear Sir,
Is there any limitation on the limits on the voltage that can be carried through inner layer tracks. Can we use inner layer tracks to carry 100V AC. If so what must be the gap between the tracks.
H.S.Ramachandra
H. S. Ramachandra,
There is an excellent discussion about trace spacing vs. voltage near the bottom of the page here:
http://pcbwizards.com/faq.htm
Brad
Hi sirs,
I am a pcb layout engineer.
Is there a signficant issue if i have sharp edge/corners on my copper Pour/Area Fill?
How about 90 Degree corners?
thanks,
sandro
Sandro,
Sharp corners on copper fills and traces can be an issue with high voltage. The electric field is much higher at sharp corners which may lead to arcing. For air at Standard Temperature and Pressure (STP), the minimum arc-over voltage is around 380 volts [1]. Higher altitudes and different gases can lead to arc-over at lower voltages [2]. However, for low voltage circuits, this is not generally a concern.
90 degree corners have historically concerned some people with regard to causing an impedance discontinuity in the trace or an EMI issue. Douglas Brooks has done an analysis of this and shown it to be a fairly insignificant effect [3]. Update Apr-6-2007: I have added [4].
Brad
[1] http://en.wikipedia.org/wiki/High_voltage
[2] http://en.wikipedia.org/wiki/Paschen_curve
[3] http://www.speedingedge.com/PDF-Files/90degbrooks.pdf
[4] http://circuitcalculator.com/wordpress/2007/04/06/effects-of-corners-in-pcb-traces/
thanks brad
sirs,
can somebody explain the TDR (Time Domain Reflectometry).
Thanks,
sandro
Sandro,
TDR is a big topic that deserves its own separate article. But for now I am going to totally cop out and recommend that you do a Google search.
Brad
Sir,
Nice tool. Is there any program to layout embedded resistance in the PCB itself ?
Thanks
Hi Vinoth,
Do you mean using the copper traces, or to embed physical components inside the board? If copper traces, you may be able to use http://circuitcalculator.com/wordpress/2006/01/24/trace-resistance-calculator
For physically embedding, I do not know, but does anyone else have a suggestion?
Brad
Hi Brad,
My customer would like to run 3 amps through a single or double sided flex circuit 1 or 2 oz copper traces. The traces will have a .001″ coverlay over them. Does this meen I need to look at the internal trace width or external?
Joe,
My gut tells me a 1 mil coverlay should not make much difference in temperature rise, so I would think it is safe to use the external layer guidelines. Also see page 4-14 in [1] where the author compares the thermal resistance through the board material to the board-to-air resistance. He finds the resistance through the board is the much smaller of the two, and his example is for a 60 mill board. I also found a program for analyzing flex circuits here [2], but I have not tried it.
Brad
[1] http://focus.ti.com/lit/ml/slup230/slup230.pdf
[2] http://www.rogerscorporation.com/cmu/flexform.htm
could anyone explain surface arcing causing hi-pot test failure of Al substrate PCB. will dielectric layer can conduct electricity or be in breakdown or damaged by arcing
does anyone has experience on punching Al substrate PCB, our products’ failure rate is very high during hi-pot test, which we think it is because the puch damage the circuit and the dielectric layer. the circuit to board edge is 1.2mm, thickness of Al substrate is 1.6mm, foil is 2 Oz, the blanking puch has a relief in 0.8mm width to avoid touching the circuit.
(See Tips to Avoid Arcing - Editor)
What is the relationship between current and trace thickness? And, what is the relationship between temperature and copper density?
Regit,
I posted the answers to your questions here:
Current vs. Trace Thickness and Temperature vs. Copper Density
Brad
I have a nagging question about the trace width calculator for internal traces. Intuitively I would think that for a fixed temp. rise, say 10 deg. C, that the trace width requirement would change depending on how long the trace is. If the trace is very short the internal dissipation would be very small and the board material would act like a sink for small values. As the trace length is increased the trace dissipates more energy and at some point one would think the trace width would need to be increased to maintain the 10 deg. C rise. Where is my thinking going wrong?
John,
Your thinking is not wrong. Many things like trace length, board size, board thickness, copper thickness, number of planes, mounting of board, position of trace on board, and airflow can all affect the temperature rise of the trace. However, this calculator is based on IPC-2221 which takes the approach of modeling a “typical” board and trace. See [1] for more information.
The length parameter in this calculator is only used to calculate the resistance, voltage drop, and power dissipation, but does not enter into the IPC-2221 temperature rise calculation. The Flomerics report referenced in [1] finds that the formula in IPC-2221 correlates to a 4×6 inch board with a 6 inch trace running across the middle of the board.
I am currently working on detailed thermal modeling and finding better ways of determining trace width, but for many years the method of IPC-2221 has been used with success because it gives pretty conservative results.
[1] Shortcomings of the IPC-2221 Current Capacity Guidelines
Congratulations to author(s)!!!
I was looking for such calculator now for few days and now I am lucky to work with it.
It is a good idea!
Good luck to all!
hi, I have a 16-layer board with 10mils trace width on internal layers. it has 8 signal layers and 6 planes. I want to have 50ohm impedance control matching on my signal layers but the PCB fabhouse cant make it with the 10 mil trace and want to make it 6mils. But i’m hesistant because my trace lenght is 11inches and I’m afraid that the DC resistance will suffer.. Do you have other suggestions aside from making my traces narrower? thanks! -Michelle
Michelle,
To decrease the impedance of a trace, you can either decrease its width, or increase the spacing between the trace and the ground plane(s). In addition, you may use a PCB material with a lower relative permittivity of the dielectric, but that may not be practical. Routing the trace on an outer layer (as a microstrip) rather than as an internal trace (as a stripline) may be another option. See the PCB Trace Impedance Calculator here: http://www.emclab.umr.edu/pcbtlc/. You may also want to run some calculations to see if the resistance is really a problem using the PCB Trace Resistance Calculator
Brad
OK, the obvious question is
“When will the calculator be supplemented with corrections are described by Johannes’s article? Specifically Section 2.3, item 2 and equation 5.
Joe,
As Johannes’s article did not give all of the required specific formulas for trace width vs. current, I can not directly implement his methodology into this calculator. I am however currently working on a thermal modeling study like Johannes’s so that I may get all the necessary information to create a better calculator and/or an online thermal modeling tool that takes into account board stack-up and configuration.
I assume many people will want to continue to base their trace widths on IPC-2221 because it is a public standard so I will keep this calculator around. Others may want to use Johannes’s charts to get a better idea of the thermal situation in their specific PCB format.
Brad
A number of months ago I used your calculator in reverse to determine the current carrying capability of traces on my PCB. At that time an internal trace width of 200mils (2oz copper, 10C temperature rise, 20C ambient temperature) resulted in a current carrying capability of 5.435A. When I plug in these same parameters today the result is an internal trace width of 200mils has a current capability of 6.42A. Because of this discrepancy I checked the IPC-2221A curves. When using the same parameters with the IPC-2221A curves I get an internal trace width of 200mils has a current capability of ~5.9A. Am I doing something wrong or has the calculator been changed? I apologize if this was discussed in a previous posting. Thank you for the help.
Hi Jason,
Yes, some others have asked about this through emails, but I need to post a comment about it, so thanks for asking. What you are seeing is the result of the calculator being updated based on changes to the IPC-2221 standard a while back. The standard now contains formulas whereas before, it had just curves and I had to come up with my own curve fitting formulas to make the calculator. The calculator now uses the published formulas. Curve fitting to empirical data is not an exact science, so the formulas will turn out different depending on who derives them. Also, the published formulas do not fit exactly to the published curve because if you look closely at those curves, you will see that the scale is not linear or log, but some messed up hand drawn scale (done in 1954!), so it not very feasible to get an exact formula for a curve like that. For more information about the ins and outs of IPC-2221, you might be interested in reading Johannes’s article discussed above.
Brad
Q. What is the significance of the track size & copper weight for the different PCB parameters like impedeance, voltage, & current?
Syed,
Trace impedance is dependent on not only the geometry of the trace, but also on the geometry of the return path, spacing between the trace and return path, and the dielectric properties of the insulating material. The voltage that may be applied to a trace also depends on the spacing between the trace and surrounding traces, and the dielectric properties of the insulating material. The current is a function of the cross-sectional area and allowed temperature rise.
Brad
In message #20, Brendan says the PCB trace for a fused supply should be rated for 160% of the fuse rating.
Does this assume there might be a steady-state current of that value, or is this considering a dead short that would blow the fuse?
What temperature rise should be used for the short-circuit scenario? Obviously the current would be very high, but only for a short time.
Re: Traces for Fuses
It sounds relatively safe to design the trace for 160% of the fuse rating and be able to survive a short. My reasoning being, the thermal mass of the PCB will be much greater than that of the fuse. However, since there are many different types of fuses, the best thing is to consult the manufacturer of the fuse you are using and see if they have application notes about the PCB layout.
You might want to look at link [1] below - they recommend using additional copper thermal planes to help spread and dissipate heat in traces that need to operate near the fuse’s rating for extended periods.
Brad
[1] http://pdfserv.maxim-ic.com/en/an/AN405.pdf
Q) Is there a website where I can know all about “Track size”, specifications, limitations, its impact on the PCB etc etc.
Princepk,
There are some good resources here:
http://www.pcdandm.com/cms/
and here:
http://www.smps.us/pcb-design.html
Or try Google searches on keywords PCB, PWB, design, or layout.
Brad
Hi:
Can anyone provide current pulse calculation for short duration. such as 10ms or so? I have seen in here the way to calculate the current for continuous, not the pulse current. Thanks
Victor,
You’ll need software that can do “transient heat transfer” modeling. You might want to try Students’ QuickField available here:
http://www.quickfield.com/free_soft.htm
Brad
Hi Guys
I have a project were i need to design a loop antenna on piece of PCB board, the frequency range is 868MHz, and i was to incorperate a loop antenna, i was wondering how do i figure out the loop length and thickness of the copper strip to make this antenna active?
Rav,
This note may help:
http://www.seapraha.cz/Download/AntennaDesign.pdf
Brad
Hi,
Is there a way to find out how much current can a via is able to handle with the geometries listed below?
FHS = 13 mils
Board Thickness = 185 mils.
1 mil barrel
other info:
Copper (plane) weight = 2, 3 and 4 oz.
Supply Voltage = +5V
3 internal plane layer (2, 3 and 4 oz)
Very Nice!
Thanks for providing such handy tool.
Yusuf
vasavi,
is there any difference between 90 degree bend and 45 bend while routing(mens any signal loss is their)
thanks
sir i want to find the complete description of a pcb so that i can make my own pcb with no error , sir, i also want to mention that i am an student of electronics an does not know whwt is a pcb
Vasavi,
With high speed design, 90 degree square corners can cause some small reflections because the trace gets a little wider at the corner and the impedance goes down a bit. For very high speed designs, it is better to bevel or round the corners. For more information, see:
http://circuitcalculator.com/wordpress/2007/04/06/effects-of-corners-in-pcb-traces/
Brad
Kamil,
Check these links out:
Coombs’ Printed Circuits Handbook
https://en.wikipedia.org/wiki/Printed_circuit_board
Brad
thank u very much sir i got much more guidance from those sits reffered by u and i hope that u will always help for me
oog by sir , and God bless u
hi sir can u please tell me what is field fringing?
Hello
Thank you for your pcb width calculate program. This program is very useful and good. Can i ask you this program? What’s mean internal layer and external layer? I don’t understand these words. Can you help me and explain that?
thank you. have a good time!!
kwanseok,
External Layer: Copper is on the outside surface of the PCB (may be covered by solder mask). Internal Layer = Copper is buried within the PCB.
thank you brad,
I have one more question.
Thickness mean only copper or inclued pcb insulation material ?
kwanseok,
The Thickness only includes the copper, not the insulation. Thanks for the questions.
I seen very first time pcb trace width calculator so my question is that what is the thickness.
Rana,
I added a diagram at the bottom of the main article above.
Brad
Hi,
I really like what you do here - great help.
Just a comment though - there may be a javascript bug in the calculation routines: if I change the copper weight e.g. from 1 to 2 Oz, the Resistance, V drop and Power loss values are not updated. The “Required Trace Width” IS updated. Tried in Firefox and IE6 - no difference.
Hi Kob,
It is not a bug. If you change the thickness, the width changes so that the cross-sectional area remains constant. Thus, the resistance, voltage drop and power loss do not change. If you need to calculate the resistance of a trace of a specific width and thickness, try my PCB Trace Resistance Calculator. Thanks for the question.
Brad
I have a simple question, hopefully it has not been discuss earlier. The maximum peak current for my product is about 2.7A and average of 0.5A. i was wondering, should i key in the max or average current on the “Input Current”. please advice
Benny,
The thermal time constant of the traces on the PCB is typically in the seconds, therefore, it is advisable to use the use the RMS value of the current. Also see comments 6 and 25.
Brad
Hi
i just wanted to know..if you have 2 oz 2mm track, at what temperature rise will it burn away or break..
Sukhwinder,
Note that the acceptable temperature rise does not depend on the trace’s size – it is a matter of considering at what temperature damage starts occurring. Damage to the board’s insulating and binding materials occurs before damage to the actual copper trace. This occurs at the Relative Thermal Index (RTI) of the PCB material. At the RTI, board failure progresses at a very slow but measurable rate. At higher temperatures, failure happens faster. (Also see comments 51 and 52 above.) Copper does not melt until 1084.62 °C (or 1984.32 °F) but it can certainly happen with enough current. If a trace is heated until it peels off the board, it loses its main heat sink and the temperature rises rapidly. The equations used on this page are based on experiments done far from the melting point, so I would not expect them to accurately predict how much current it would take to melt a trace.
Brad
Hi..^^
I have one question about your calculator.
I read through IPC-2221 and I also saw a graph width vs. current.
But theres’s no equations related that graph..
Is that graph made using measurement results??
Then, you made this calculator after curve-fitting that graph, too?
Hi wooolim,
The equations are in IPC-2221A. Also see comments 39 and 40 above. Yes, the original graph was based on measurements. For some more background information and discussion of the measurements, see [1] and [2] below.
Brad
[1] http://www.ultracad.com/articles/pcbtemp.pdf
[2] http://www.flomerics.com/flotherm/technical_papers/t341.pdf
Hi,
I want to know about four-layer PCB design. Please give me some documents about high-speed PCB design.
Hi Brad, can you verify my calculations.
I have a 6amp circuit on a 2oz flexi board inside an aluminium housing potted with a (reasonably) thermally conductive resin. The housing can operate up to 80c. Applied current is 3 phase 6 AMP RMS.
I make it a track width of around 3mm if I allow 20c rise. However, most of the tracking is flooded to the board profile where ever possible.
The circuit boards can be series joined up by soldering end to end.
However I have to bottleneck down to 1.5 mm every time I join one circuit to another, and that 1.5mm track has to carry the 6A over a distance of about 1 to 1.5mm, but is directly on the flooded areas either side.
Your comments would be appreciated.
Clive,
Since the 1.5 mm width runs are only 1.5 mm long and are connected to flooded areas, I would not be too concerned about the neck-down. However, since your assembly is potted and the IPC-2221 guidelines are based on boards in air, you might consider using a 2-D thermal analysis program to find a more realistic estimate of your temperature rise for your assembly as a whole.
Brad
bahman,
See http://circuitcalculator.com/wordpress/2007/05/29/four-layer-high-speed-pcb-design/
Brad
Are you aware of any calculations for conductors expected to carry currents on the order of 200-1000A? Most everything I have found is only reliable for calculations up to around 30A.
Shawn,
For 200 to 1000 Amps, I think bus bars would generally be used instead of PCBs. I found this about bus bars:
http://www.copper.org/applications/busbar/ampacity/busbar_ampacities.html
Brad
Any change to the Current carrying Capacity calculator for SPACE applications ? Please advise ? Any derating factors included in the calculator ?
Steve,
When I was designing power electronics for space application, we generally used the trace width for 10 degrees C rise and internal layers (even wider if possible). If you look at the original MIL-STD-275 spec, that was the most conservative curve plotted. Plus, since there is no air cooling, we figured it was like even the external layers were internal. No additional derating factors were applied. We had thermal analysts making sure the calculated heat from all the components and traces had an adequate conduction path out of the board. Thermal-vac testing was also done on all designs and I don’t recall ever running into an issue where a trace was not wide enough.
Brad
The temperature rise is somewhat of a sticky issue. I have an application where I am designing a universal board where the customer can place a device into a socket to burn-in. The current can vary from device to device. The trace width is set (based on space limitations), the trace thickness is set and the environment is set (150C). So my question is: what temperature rise do I use to calculate the maximum current the trace is capable of?
1) 10C as stated in Note 1C.
2) The allowable_temp_rise = max_allowable_board_temp – max_ambient_environment_temp (Comment 54). In this case 230C (rating on material) - 150C (environment) or 80C
3) Note 3 in IPC-2221 (p38 next to chart) - permissible temperature rise is defined as the difference between the ambient temperature and the maximum sustained operating temperature of the assembly. In this case 150C (environment) - 20C (ambient) or 130C.
Hi Tony,
Deciding what temperature rise to plug in to the calculator is a matter of deciding how hot you want your traces to be. Also keep in mind that 1.) the calculator is not exact for all board configurations and 2.) temperature rises from other traces and heat sources are cumulative and stack on top of each other. If you are working on a design that pushes the materials near their temperature limit, I recommend doing a formal thermal analysis and verifying it by measurements. (Also see comment 46-48 and 70.)
Brad
Tom wrote:
Hi,
I found your PCB calculator and thought it would be very useful for my next project. I am making a single layer circuit board and was trying to determine the line width for my circuit. However, I saw that the calculator shows amperage values for internal and external traces, and was unsure of the difference between them.
My question is which value would I use to determine the appropriate line width on my single layer board?
Thanks,
Tom
Website: http://tomsrocketry.com
—
Hi Tom,
The IPC-2221 formulas (which my trace width calculator is based on) recommend using more copper for internal layers than external layers. The formulas are also based on a two-layer board with a full copper plane on one side that acts as a heat spreader. For a one sided board, it is a good idea to flood the unused areas with copper to get a similar heat spreading effect. Then, your traces will have a similar thermal impedance to ambient as “IPC-2221 external layers” and you can reasonably use the IPC-2221 guidelines for external layers to design your board. For more insight, see [1].
Brad Suppanz
[1] Shortcomings of the IPC-2221 Current Capacity Guidelines
http://www.flomerics.com/flotherm/technical_papers/t341.pdf
Hi
I have PCB design and need antenna track 4 circle round coil and track spacing 500um so I want to know what is the track width in mm or mils.
Thanks
Hi all,
I am looking for a calculator that will allow me to figure trace width depending on input power for RF signals.
Thank you for your help!
Ori
Ori,
Try using the new Skin Effect Calculator to find the skin depth. Once the skin depth is known, the effective trace thickness is the lesser of the skin depth and the actual trace thickness. Plug the effective trace thickness into the above trace width calculator.
Brad
Hi Brad,
Thanks for the very prompt reply! I got a very helpful result for me!
I do want to clarify couple of points though:
1. The skin depth only refers to 1/e of the current. Is taking only one skin depths not a bit pessimistic, especially when using normal 1/2 oz copper? Should I use maybe two (or something in between)?
2. In microstrip lines you always get the edge effect, where the RF distribution is very un-even and the current concentrate near the edges. How can I compensate for that effect when using the calculator?
3. Since the calculator only takes current as an input I assume that for a specific input power and specific microstrip (or stripline) characteristic impedance, I need to divide the power by the characteristic impedance and take the square root to find the current?
4. What happens if I don’t have a large ground plane? If my ground plane is only 10 to 20 times the width of the trace, does the calculation still hold?
5. Is it possible to add to the skin depth calculator the ability to choose different metals?
Sorry for bombarding you with questions
Thanks for your help,
Ori
Ori; good questions. Answers:
1. While the current density falls by a factor of 1/e at the skin depth, you have to integrate to get the resistance, and per [1], “The resistance of a flat slab (much thicker than d) to alternating current is exactly equal to the resistance of a plate of thickness d to direct current.” So, I would design the trace’s width based on an equivalent trace thickness of one skin depth.
2. The edge effect was said to be small in [2], but you may want to get a free copy of QuickField student edition to simulate your specific case.
3. Yes, somehow you need to find the current. It will be a function of both the characteristic and load impedances.
4. It depends on frequency and spacing. You would probably have to run it in QuickField to find out.
5. Yes, I thought I would add more metals to the skin effect calculator when I get a chance. Probably silver, gold, and aluminum. Any others of interest?
[1] http://en.wikipedia.org/wiki/Skin_effect
[2] Proximity Effect in Differential Pairs
Hello,
There is a Track between two IC’s. The problem is voltage get dropped. If we add additional wire physically parallel to the Track it is working fine (No drop).
Track width 5 mil.
Track length: 6323.48 mil
Supply current from the IC : 23mA
What would be the problem?
Thanks
LAKSHMINARAYANA,
You did not specify the copper foil thickness, but using the Trace Resistance Calculator, I get:
(Thickness, Resistance, Voltage Drop @ 23 mA)
(0.5 oz, 0.614 Ohms, 14 mV)
(1.0 oz, 1.23 Ohms, 28 mV)
This is a pretty small drop, so unless your circuit is very sensitive, something else may be going on. I suggest that you measure the resistance of the trace with an ohmmeter to see if there is a problem with the trace. If the trace resistance looks okay, look at the waveform on an oscilloscope. Depending on the frequency, transmission line effects could be coming into play and distorting the signal.
Brad
Do you have or know of a Current Carrying Capacity of a Via given its dimensions? Would appreciate if you respond.
Hi Brad,
, can’t remember ) a rule of thumb saying that if the ground is 3 times larger than the trace you can consider it almost as infinite from thermal consideration. I don’t know If I’d trust that, but I guess it is easy to simultae in QuickField.
Thanks for your previous reply. I have been playing with the QuickField software, so far I haven’t got a good hold on it yet, but I am sure I’ll manage eventualy.
Regarding to my previous posting:
2. What I meant by “edge effect” is the way current is distributed on microstrip lines at high frequencies. The current distribution takes the shape of the letter “U” even when talking about non coupled lines (you can see in reference no. 2 that the edges of both striplines are red (higher current) while the centers are blue (low current), it always happens above 100 MHz or so, and from what I’ve seen since I last posted here is that there is no simple answer to that, and the dissipation calculation usually ignores it.
4. I have encountered somewhere (maybe in “BeTheSignal” website (which you pointed to me
In addition I found in rogers-corp website a calculator which gives impedance calculations and thermal losses at RF/MW frequncies.
Thanks for all the help!
Ori
Felix and all,
For estimated via ampacity, please see my updated Via Calculator.
Brad
Is there an equivalent calculator for traces on ceramic substrates ??
Thinking specifically about Alumina 96% & 99%, and AlN ….
What are layers in the pcb?
Kamil,
The number of layers in a PCB refers to the number of copper layers sandwiched between the nonconductive layers. Many copper layers can be sandwiched between the nonconductive layers. Copper layers can be solid planes or have many individual traces.
Brad
I want to use a trace as a current shunt for monitoring current in a motor driver. Your reference indicates that 1 oz copper has a resistivity of about 0.5 milliohms per square, which would seem to say that the resistance increases for larger areas. Does this mean that I need 1000 sq in of copper to create a 0.5 ohm shunt? What am I missing here?
Howard,
Yes, each square of 1 oz copper has a resistance of about 0.5 milliohms. Large and small squares have the same resistance from one edge to the other as long as they are squares and the current is distributed evenly. Therefore, for a 0.5 ohm, you could use a 1000 squares in series i.e. a 10 mil wide by 10 inch long trace (although it may not be practical). You can try it on the trace resistance calculator. Also, note the temperature dependence as seen in the calculator.
If you have one big square copper plane and current is injected at one point and flowing out at another point, the current will not be distributed evenly, but will be concentrated at the connection points. This makes the resistance appear somewhat higher than the per square value. On the other hand, the 10 mil wide by 10 inch long trace will have very even current distribution except perhaps at the very ends. Therefore, the resistance per square is useful for breaking larger shapes down into squares and quickly estimating the resistance.
Brad
Hi,
Thanks for your earlier reply. i have another query. I have a track about 2 inches length. but the width is not unifrom. it varies from 2mm to 6mm at some places on 2 oz copper. How should i calculate the current it can withstand???
Thanks in advance.
Is there a version of this pcb track calculator that allows for the skin effect at high frequencies?
Sukhwinder,
For traces of varying width, the current carrying ability depends on the length of each section. The narrowest part of the trace will be hotter. To be safe, design the narrowest part of the trace to handle the current with a reasonable temperature rise.
Brad
Nigel,
For high frequencies, you can determine the skin depth using the calculator here:
http://circuitcalculator.com/wordpress/2007/06/18/skin-effect-calculator/
and then use the skin depth as the trace thickness in the above trace width calculator.
Brad
How can we decide the copper thickness of a track? Generally, what are the guidelines for copper thickness on power supply boards?
My only comment is THANK YOU for making such an excellent, useful tool available to us. I clicked on your sponsor’s link just to help make sure that you don’t go away…
Praveen,
Copper thickness can be traded against width. Thicker copper leads to less width for the same current and temperature rise.
Brad
Dave,
Thanks for the kind words and support!
Brad
Hi,
My requirement for PCB is 2A at 28VDC, but my spec says that the trace in PCB has to survice a 200ms inrush of 30A. Please anybody can guide me how do calculate the trace width in such scenario’s???
Regards
Baskar
Hi,
What are the features of teardrop on some pads?
Please help me to answer it.
best regards,
kenny
Kenny,
Teardrop pads allow more space to run traces between pads while maintaining some meat to the pad so the pad will adhere to the board better even if the hole size is almost as big as the skinny dimension of the pad.
Brad
Great !
This is a useful tool!
Can we use this tool offline ?
Gayatri,
It’s okay to use this off line. Just save a copy of this page to your computer. However, I must request that you don’t publish or redistribute it.
Brad
i would need a similar calculator, but for processor core power delivery IR-drop and DC impedance calculator. For higher power processors, the power delivery is done by a split plane (sometimes on the surface), and not on a long narrow wire. The important outputs are the voltage drop, and the DC resistance between the DCDC converter and the processor core. both of them are connected to the split plane through lots of vias. The inputs are the splitplane-shape, copperthickness, current, via parameters. There are 50000 dollar software, to exactly simulate, but a less accurate calculation would be also better than nothing.
Hi Istvan,
For I*R drop and DC resistance of planes, you can set up an Excel sheet fairly easily to solve the 2-D finite element field equations. Hopefully I will find time to write up how to do it. It is similar to but even more simple than the transmission line calculator.
Brad
Hi Brad.
thanx, it would be really good.
could you send me an email when its available?
Hi Brad,
First of all, congratulations for your job.
What can you say about keeping the solder mask open or partially open along the trace? Is there an estimative of how much it can decrease the temperature elevation?
Thanks a lot.
Hi,
How would the calculation change for a pure gold trace, not a copper trace?
Thanks for the great tool.
Bill
Hi Bill,
Pure gold has about 1.3 times higher resistivity than copper, so the Joule heating would be correspondingly higher. The formulas could be adjusted with some time and effort.
Brad
Edmar,
I don’t have numerical estimate of the effect of the solder mask on trace heating, but I believe it is a very small effect. I would not count on the traces being noticeably cooler without solder mask.
Brad
is trace the same as pcb thickness?
[J.R. - No. The pcb thickness refers to the whole board. Brad]
hi,
I would like to know where (fabricant) I can find the smallest trace on a PCB. Usually people can do .003. This is way to big for me. Is anybody can help me?
Thanks
Martine
Dear Brad,
I am designing a PCB for a combined electronic clock/calendar to run at about 7.5v DC. I don’t anticipate the max. current being more than 250 to 400mA.
If I use 0.02 inch tracks at 1oz of copper per foot, what minimum spacing ought to be allowed between tracks? I hope I am right in thinking that if I used tracks with 2oz copper per foot this would perhaps allow even closer spacing?
Is there a formula for this which takes into account the weight of copper, the track width, and the voltage and current in the tracks, including the case where the live supply track has to run next to the 0v return track ?
Also, any hints on size of solder pads for ICs and other electronic components would be gratefully welcomed.
Thanks very much indeed for your track width calculator. As a 74 year old who took up electronics late in life, I appreciate all the help I can get!
Kind regards,
George
Hi George,
For low voltage like 7.5V, the trace spacing can be as close as your PCB fabricator will allow. Most fabricators can do 5 mil lines and 5 mil spacing, but 8 mil spacing is a typical minimum spacing used by board designers. I don’t think traces would be allowed to be closer for 2 oz copper vs. 1 oz, but you would have to ask your fabricator.
For pad sizes of IC’s and other components, it is best to consult the data sheets and application notes from the vendors. Most will provide recommended footprints (land patterns). Most PCB layout software also comes with a library of footprints for standard components and some include a tool for generating footprints. Industry standards such as IPC-7351A provide guidelines for designing land patterns. A free land pattern calculator is available here: http://www.pcblibraries.com.
Brad
hi, please tell me urgently
what is field fringing in PCB?
Hi Bushra,
Field fringing refers to electric and magnetic fields that extend into the areas surrounding traces and planes in a PCB. Theses fields are sometimes a concern for radiated emissions.
Brad
In designing traces on PCB’s for high voltage circuits should the corners be rounded, not 90 degrees, to prevent arcing? If true, what voltage value do you start at for rounded traces?
Hi, I’m new in the design field. Could you tell me what affects the maximum track length of a PCB? If I have a rise time of a DDR 0.3ns and I’m using FR4 which has a delay of 1400ps/inch [Editor: I think you mean 140ps/inch], what factors determine maximum length of my PCB track length and what is the formula for calculating it?
Gaurav,
In terms of maximum trace length vs. delay, it comes down to a question of how much delay your circuits can live with. Then, just apply:
Allowed_Length = Allowed_Delay/(140 ps/inch)
where 140 ps/inch is typical for a microstrip on FR4
I will plan on releasing a web calculator for this in the future.
Brad
Mike,
Please see http://circuitcalculator.com/wordpress/2006/12/19/tips-to-avoid-arcing/ . To be very conservative, you may start worrying about rounding traces at 250 V and up.
Brad
Hi,
I am going to be designing a circuit that will have relays that will carry 20A at 120V. The relays will be located as close to the output terminal blocks as possible. Nonetheless, they will still need to be .125-.250″ long. With 1 oz copper, the calculator still estimates I need at least 1/2 inch width, which just isn’t physically possible. I could look into 2 oz copper, but that only helps shave off a couple hundred mils.
Any thoughts?
Hi Steve,
You can use more layers, allow higher temperature rise, or provide a heat sink. Ultimately, it is about getting the heat out.
Brad
Thanks, Brad. I am going to use a 2-layer board. It’s a very simple circuit, I don’t want to bother with more layers than that. I can double up the traces on the top and the bottom and I may be able to add trace material away from the pins.
Here’s what’s odd. Say you have two points .125″ apart. If you create a 1″ by 1″ wide copper area that encompasses them, the current will not flow through all the copper, just between the two points. It’s hard to conceive additional copper decreasing the overall resistance of the connection when most of the copper is in the path of current.
Now, if I am using more copper more as a heat sink than to decrease the overall resistance between the two points, that surely makes sense. Is there any advantage to using a large copper area as opposed to a shape that may “finger out”? Are there any issues to using high current for a same line on both sides of the board?
One way around all this I may be able to use: some high power PCB relays also have .25″ quick disconnect connectors on top for the power connections.
Hi Steve,
As you noted, adding copper where current is not flowing does not affect the electrical resistance, but it helps to spread the heat. When designing a PCB for higher currents, one must envision the heat flow as well as the current flow. It is a coupled thermoelectric problem. Heat flow is analogous to current flow. There is thermal resistance, a circuit path, and a “ground” where the heat flowing towards. In the thermal circuit, “ground” is the ambient temperature. Copper is a very good heat conductor that allows heat to flow laterally through a PCB and the thermal resistance to ambient is proportional to the area of the heated surface. Adding copper fill areas helps to spread heat so it can be dissipated. I don’t see a thermal advantage to “fingers” – a solid area would be better, but usually it has to be broken up by other traces.
Brad
Hello everyone,
I would just like to run my scenario past you guys and check that the values i’m getting are correct -
Circuit voltage = 230VAC (50Hz)
Trace width = 2.5mm
Trace thickness = 2oz (i’m assuming that this is ‘copper weight’)
Temp rise = 10 degrees C
During the design I referenced standard BS6221 which indicated that the tracks designed to the above specification could carry currents of 6 Amps. Now, I have been testing alternative devices that this circuit will supply and have managed to source a cheaper component but it unfortunately requires more current (highest measured value at 6.5 Amps).
This has driven me to evaluate my track widths to determine if I can continue to use the specification above or, as I suspect is going to be the case, increase my track width.
Thats when I stumbled upon this gem of a site. However, the values I’m getting here are completely different to those I obtained from the British Standard (BS6221) reference table.
Any ideas?
Cheers
Mike
Woops! Just realised that I was looking at the ‘internal trace width’ results. The ‘external trace width’ results are what I was after and they pretty much match the BS standard values.
Apologies.
Mike
Hi Mike,
It’s good to hear this calculator ultimately lined up with the BS6221.
Brad
Is there any limitation with the number of PCB layers vs. PCB thickness? Let me know if there are any standard documents which are available.
Yogasmitha,
The limits on PCB layers vs. PCB thickness are mostly up to the capabilities of the PCB fabricator. For a good reference on thin PCB laminates, see [1] below.
Brad
[1] http://www.sanmina-sci.com/Solutions/pdfs/pcbres/Thin_Laminates.pdf
what is the current carrying capacity of microvias?
i have a customer that wants to reduce their number of mv’s within smt pads, but they dont want to affect its performance.
is there an easy formula to follow?
mike
Mike,
Please see:
http://circuitcalculator.com/wordpress/2006/03/12/pcb-via-calculator/
[…] Regarding the PCB Trace Width Calculator [1], Regit asks: […]
Hello,
This is a great looking tool and a well maintained site. Nice one mate.
I am a bit confused about the scalibility of my calculations, can you please help?
A 20 amp, 2oz, external trace requires a width of 368mil for a 10 degree temperature rise.
A 5 amp, 2oz, external trace requires 54.4mil for a 10 degree temperature rise.
I have no problems accepting a non linear relationship, however:
If I place a total of four 5amp traces next to each other on a board (seperated or not, I believe it’s irrelevant) I am essentially passing a total current of 20 amps. The width required in this case would be 4x 54.4 = 217.6mils. Why so much less than the 368mil required for a 20 amp trace?
Does this calculator assume that all other traces on the board are at ambient temperature?
Regards,
Tony.
Hi Tony,
Four traces next to each other will cause a cumulative temperature rise as heat from one spreads to the other. Yes, the calculator assumes one active trace. When more than one trace are active, you get superposition of the temperature rises.
Brad
I noticed that the calculator does not account for voltage. I happen to have a situation where I could potentially have to deal with 600V at 100 Amps. I realize the tool only deals with currents of 35 Amps max. I’m hoping to limit the current to well under that. But wouldn’t the voltage also create potential problems?
Hi Dennis,
This calculator just calculates trace width which is a function of current and not voltage. However, trace spacing IS a function of voltage. Also see Tips to Avoid Arcing and comments 55, 56, 58, 79, 162, 165 above.
Brad
Copper Thickness Question:
Usually a 2 oz/ft^2 “start” copper PCB get plated up to approx 3 oz/ft^2.
The extra 1 oz of “Plate-up” typically has only 60-70% of Conductivity of Base Start copper.
When I enter Thickness in your program…what do I use for this example?
Hi Dennis,
Good question. I have heard that plated copper has higher resistivity, but this idea seems to be based on out-dated PCB technology. You may want to consult your PCB fabricator about this, but the information I am getting is that plated copper in modern PCB processes in virtually as good a conductor as the base copper.
That being said, if you needed to, you can easily find an effective thickness as follows:
For example, 2 oz base copper with 1 oz plate up at 60% conductivity
Effective_thk = Base_thk + Plated_thk * pct_conductivity
= 2 + 1 * 0.6 = 2.6 oz
I need to calculate the trace width for single pulse current. The max. DC current is 30A for 15ms. Can anybody please tell me how to dertermine the trace width? Thanks,
what is field fringing in PCB?. I know this is a very simple question but please help me out.
[Editor - See comment 161]