Tips to Avoid Arcing December 19, 2006
I have gotten several requests for information about high voltage PCB design and how to avoid arcing.
For example, Ken writes:
“Could anyone explain surface arcing causing hi-pot test failure?”
I thought I would make a short post to serve as a place to discus these issues.
For high voltage [1], it is imperative to have the appropriate clearance and creepage distances for the voltage you are dealing with. Clearance refers to the shortest distance between electrodes directly through an insulator or open gap while creepage refers to the distance along a surface. For this, I recommend you check out the calculator at http://creepage.com. Distances should be checked by setting up rules in the PCB layout tool so errors will be flagged. The creepage path may be increased by placing slots in the PCB or adding a physical barrier.
If the distance must be small, special coatings or potting may be needed. Voids or air bubbles in the insulator material can form corona that can eat away at the insulator, so vacuum potting or vacuum deposited coatings are sometimes used.
In terms of the layout of the PCB traces, it is important to avoid sharp shaped electrodes because the electric field is concentrated near sharp features. It is therefore recommended to at least bevel, or better yet to radius all corners of traces and shapes around the high voltage on the PCB. This includes incidental fill patterns.
It is also important to maintain surface cleanliness so an arc does not flow along surface contamination.
There is also an effect of gas pressure or altitude that comes into play in some applications. According to Paschen’s Law [2], the breakdown voltage of a gap is a non-linear function of the product of the gas pressure and the gap distance:
V = f(pd)
This function generally has a minimum at some point, which determines the lowest voltage at which arcing can occur. This minimum can be as little as ~250 V for air, and lower for other gases.
[1] http://en.wikipedia.org/wiki/High_voltage
[2] http://en.wikipedia.org/wiki/Paschen%27s_law
- Posted in : Uncategorized
- Author : Brad
Comments
Remember that any trace looked at from the edge is sharp along its entire length. Any two traces on the same side of the board have sharp edges facing each other.
I’ve seen some nasty arcing behavior in a CCFL backlight circuit. The lesson is to keep any extra copper - including planes- as far from the high voltage as you can. And put a guard ring around the whole mess to protect the rest of the circuit from damage in case the arcing occurs.
Blake,
Those are excellent points. If anyone has more good tips, please comment.
Brad
I’ve had traces on a telco modem that were problematic, and so was cost. I changed the silkscreen of the PCB such that the traces had soldermask coating them, and a coat of silkscreened paint (also used for the ref designators) I tested approx 1KV dielectric increase by coating traces with the white paint.